Generally, high electron mobility transistor (HEMT) is used in integrated circuits having almost all of the frequencies of X-band or more including low-noise receivers and power amplifiers having a frequency of X-band or more respectively, monolithic microwave integrated circuits (MMICs) having a frequency of millimeter wave band, and the like. Preferably, high speed devices such as HEMT transistors should have a short gate length and a large sectional area so as to improve noise characteristics by decreasing the gate resistance. In order to meet the requirements as above, gate electrodes having a T-shaped section is used. But, the conventional photolithography methods are in need of the resolution for fabricating a fine line width below 0.25 .mu.m of the gate channel. Therefore, electron-beam lithography is most widely used for fabricating the T-shaped gate.
FIGS. 1A to 1G are cross sections illustrating process steps in a method of fabricating a semiconductor device using the electron-beam lithography technique.
First, as illustrated in FIG. 1A, an ohmic layer 1 such as AuGe/Ni/Au and a first metal layer 3 such as Ti/Pt/Au are formed on a GaAs substrate 1. As illustrated in FIG. 1B, a first resist 4 having a very low sensitivity to electron beams, for example PMMA, is coated on the resultant structure and baking process is performed. Then, as shown in FIG. 1C, a second resist 5 having a very high sensitivity to electron beams is coated on the resultant structure and baking process is performed. And, a third resist 6 is coated. Here, the sensitivity to electron beam of the third resist 6 is higher than that of the first resist 4 and lower than that of the second resist 5. Then, baking process is performed. As illustrated in FIG. 1D, exposure to electron beams and development are performed sequentially so as to leave the resists having a suitable shape for T-shaped gate as shown in FIG. 1E. As shown in FIG. 1F, a gate metal layer 7 such as Ti/Pt/Au is deposited. If the resist is stripped, the upper metal layer is lifted off thereby forming a T-shaped gate electrode as shown in FIG. 1G.
In the conventional method employing electron beam irradiation, high resolution (0.10 .mu.m or less) is obtained, but it is difficult to enhance throughput in manufacturing semiconductor devices because a lot of exposure time is required.
Recently, studies of forming techniques for a T-shaped gate pattern using photolithography techniques are actively underway. And, photolithography techniques for realizing a fine line width is under development by using KrF excimer laser steppers and modified masks such as phase shift masks for improving resolution. But, the above techniques utilize a double layer resist structure or tri-layer resist structure as in the electron beam lithography process, and use a double exposure process and a double lithography process. Therefore, the above techniques have the problems of occurrence of misalignment due to the double lithography process and generation of inter-layer remaining materials derived from the resist hardening process which is an indispensable process to the above techniques. As a result, the characteristics of devices are deteriorated and the process reproducibility can be disturbed.